Author: Gareth Halfacree

Gareth Halfacree is a technology journalist and technical author best known for his work on the Raspberry Pi User Guide and an upcoming book covering the BBC’s micro:bit project. A keen open source advocate and RISC-V fan, Gareth is responsible for curating our fortnightly community round-up posts.

RISC-V Foundation Announces OpenSBI 0.1 Release

An initial implementation of an open supervisor binary interface (SBI) for RISC-V, imaginatively dubbed OpenSBI v0.1, has been released with support for the HiFive Unleashed, Kendryte K210-based development boards, and QEMU virtual machines. “OpenSBI is an open source implementation of the RISC-V Supervisor Binary Interface (SBI). SBI serves a critical… Read More

Semtech Releases Open-Source LoRaWAN Gateway Software

Semtech has announced the release of an open-source packet-forwarder protocol designed for LoRa-connected gateways, and it has partnered with The Things Industries to integrate it into 700 miniature gateways to be distributed at The Things Conference this weekend. “Semtech’s LoRa Technology is enabling the devices, networks and applications (DNA) of… Read More

Bluetooth 5.1 Standard Adds Centimetre-Scale Location, Direction Finding

The Bluetooth Special Interest Group (SIG) has announced the release of Bluetooth 5.1, which brings with it a new direction-finding feature capable of detecting how far away and in what direction devices are to centimetre-level accuracy. “Location services is one of the fastest growing solution areas for Bluetooth technology, and… Read More

Western Digital Releases SweRV RISC-V Core Source Code

Storage giant Western Digital has officially released the source code for its SweRV RISC-V core, under the permissive Apache 2.0 Licence, allowing anyone to run, experiment with, or modify its implementation. Announced back in December, SweRV is a RISC-V core implementation developed in-house as part of Western Digital’s aim… Read More

CRU: RISC-V’s Bumper Year, LoRaWAN Growth, cocotb 1.1, and More

The RISC-V Foundation has released a video highlighting some of the key features of the 2018 RISC-V Summit, held in Santa Clara late last year and attended by over 1,100 community members. To say that the free and open source silicon (FOSSi) movement in general and RISC-V in particular had… Read More

Cocotb Testbench Hits 1.1, Promises More Rapid Release Schedule

Cocotb, the Coroutine-based Cosimulation TestBench for verifying Verilog or VHDL register-transfer level (RTL) designs using Python, has reached its version 1.1 release – and brings with it the promise of a more rapid and streamlined release schedule for the future. “This release is the culmination of work done by 50… Read More

LoRa Alliance LoRaWAN Deployments Map (December 2018)

LoRaWAN Deployments Pass 100 Operators, 100 Country Milestones

The LoRa Alliance, which is behind the open LoRaWAN low-power wide-area network protocol designed with the Internet of Things (IoT) in mind, has announced “explosive growth” which has seen it pass more than 100 network operators in around 100 countries. Designed for minimum power draw and maximum range, LoRaWAN has… Read More

Semiconductor Engineering on RISC-V, FOSSi’s Growing Potential

Semiconductor Engineering’s Brian Bailey has published a piece on the growth of RISC-V, including comment from industry experts including SiFive’s Krste Asanovic and Microsemi’s Ted Speers – and the conclusion that 2019 will be a year of major design wins for the open instruction set architecture. Beginning with a look… Read More

The Kronos Group Calls for Comments on Heterogeneous Communications Standard

The Khronos Group, best known for its work on the OpenGL and OpenCL graphics and compute language standards, has called for feedback on the potential formation of a working group targeting a new low-level, heterogeneous communications standard for high-performance embedded computing (HPEC). Targeting markets ranging from the Internet of Things… Read More

Ground Electronics' SiFive HiFive Unleashed Case

RISC-V Summit 2018 Highlight Video Celebrates a Banner Year

CRU: Raspberry Pi Goes RISC-V, New FOSS Business Model, KiCon 2019, and More

Wave Computing has announced the MIPS Open initiative, under which it plans to make the instruction set architecture (ISA) available free of charge with no licensing or royalty payments required – a clear response to the growing popularity of the open RISC-V ISA. Wave Computing, which acquired MIPS from Imagination… Read More

Design News Picks 2019 as “The Year of Open Source”

Design News’ Chris Wiltz has predicted that 2019 will be “the year of open source,” and while it’s hard to imagine the impact of open source software getting any greater than it already has it’s clear that the impetus behind open hardware is growing at an exponential pace. In the… Read More