CLEAR, a fully-open development board built around a RISC-V embedded-FPGA application-specific integrated circuit (ASIC) designed by Efabless as a showcase of what its chipIgnite platform can offer, is entering the last days of its crowdfunding campaign with just a handful of boards left to reach its goal.
“CLEAR is an open source FPGA ASIC delivered to you on its development board and its open source software development tools and all the ASIC design tools used to create it,” Efabless explained of the project at its launch earlier this year. “That’s for you to create your own – yes that’s right – ASIC.”
The CLEAR project comes from chipIgnite, Efabless’ commercial offering for application-specific integrated circuit (ASIC) design and fabrication spun out of the Open MPW Shuttle Programme the company launched with Google and SkyWater a year ago. Users can design their own chips using a logic library, then send them off to be produced into physical components – with CLEAR showcasing the sort of thing you can achieve.
“As part of the campaign we will show you everything we do including how to design your own ASIC with open source ASIC design software and how you can create a campaign just like this one for your own custom ASIC,” Efabless promises. “All that without having to make a giant hole in your pocket for ASIC design and manufacturing.”
The CLEAR board itself features a custom and fully open-source ASIC design featuring an 8×8 CLB embedded FPGA (eFPGA) alongside a VexRISCV-based RISC-V processor, 3kB of on-chip RAM split between 2kB of OpenRAM and 1kB of DFFRAM, execute-in-place support from external QSPI flash, and peripherals including SPI, UART, counters, timers, a logic analyser, and 39 software-configurable general-purpose input/output (GPIO) pins.
Those interested in receiving a board of their own have until Monday the 28th of March to back the project at $74.99 (around £57 exc. VAT) plus shipping on the CLEAR GroupGets campaign page.