The latest on developments at AB Open and across the wider community.
Western Digital Boasts of “Gratifying” SweRV Response, Releases FPGA Reference Design
Western Digital has announced a strong response to the release of its RISC-V based open silicon SweRV Core, along with the availability of an official implementation for field-programmable gate array (FPGA) use. Announced back in December 2018 as part of a company-wide initiative to transition data processing products away… Read More