Calista Redmond, newly-appointed chief executive of the RISC-V Foundation, has highlighted the organisation’s key priorities for accelerating adoption and deployment of the open instruction set architecture (ISA) and related technologies.

“With the significant uptick in RISC-V adoption over the past few years, the RISC-V Foundation Technical Committee has made it a priority to prepare the RISC-V base ISA and standard extensions for ratification,” Calista, who was appointed chief executive back in March, explains in a blog post outlining the not-for-profit organisation’s plans. “There are already a wide variety of RISC-V implementations in industry and academia, designed into applications including graphics engines, machine learning and AI, networking, storage, security, embedded and general purpose processors.

“The RISC-V community has now formally agreed on an ISA standard and frozen the ISA, guaranteeing compatibility. This means that software written for RISC-V will run on all similar RISC-V cores forever giving hardware engineers increased flexibility over processor implementation. The RISC-V community has also been hard at work developing a RISC-V compliance framework. This framework tests whether a processor under development meets the open RISC-V standards, which is critically important for companies implementing RISC-V cores in their products.

“I’d like to thank everyone in the RISC-V community for their significant contributions in helping to usher in this new era of processor innovation,” Calista continues. “If you’re not already an active participant, I strongly encourage you to get involved by joining the RISC-V Foundation and participating in a task group. To stay up-to-date on RISC-V developments, you can subscribe to our mailing lists. For me, I’m active on Twitter and LinkedIn so you can follow me on those channels. I’m always available via email at and am happy to schedule time to chat.”

Calista’s full post can be found on the RISC-V Foundation website.