Open UK, a membership organisation dedicated to promoting and supporting the use of free and open source standards and software in the UK, has announced a call for nominations for the UK Open Source Awards 2019.

“The awards have happened five times in the last 10 years, but not since 2015,” explains Open UK’s Amanda Brock. “With the massive move to adoption of open source across businesses and its rightful place as mainstream in our society by being recognised through events like the Red Hat sale to IBM and move of major organisations like Microsoft to defensive patent activity through Open Invention Network, 2019 seemed like a natural time to do it again and for me to offer to help get this back on the road.

“We hope that the awards will become an annual event and maybe in 2020 leave Edinburgh for the first time. Anyone interested in sponsoring this year’s event (there is definitely room for more sponsorship) or wish to help organise, sponsor or speak at next year’s event, should drop me a note,, @amandabrockUK.”

The award categories have been expanded from 2015, now covering: the Individual Award, for outstanding contributions to open source; Company Award, for outstanding contribution to open source either through product development or contributions to projects; Public Sector and Third Sector Award, for an outstanding open source project in the UK public sector; Diversity Award, in recognition of diversity in UK open source; and the Student Award, a cash prize of £1,500 for an outstanding contribution to open source from currently matriculated UK students.

More details are available from Amanda’s announcement and the official event website. Those interested in nominating can do so on the dedicated page until 5pm on Monday the 22nd of April 2019, while the event itself takes place on the 12th of June 2019 at the University of Edinburgh’s Informatics Forum.

The Parallel Ultra-Low Power (PULP) Platform has announced that Silicon Labs has adopted the platform to extend and customise embedded processor cores in their integrated circuit designs.

Now approaching its sixth year, having been launched by Luca Benini at the University of Bologna back in May 2013, the PULP Platform’s numerous projects include the Hero open heterogeneous research platform, the RISC-V Ariane core and extended OpenPiton+Ariane design in partnership with the OpenPiton project, and its cores can be found in devices from companies including OpenISA and GreenWaves Technologies.

The project’s latest partnership win has just been announced: a partnership with Silicon Labs. “They work with us to extend and customise the functionality of processor cores for deeply embedded heterogeneous apps for their IC products,” the PULP Platform explains “They also have a uC/OS version for RISC-V and planned a port to PULP.”

Silicon Labs has made no official announcement detailing the partnership, but did provide information on its efforts with the RISC-V open instruction set architecture (ISA) in a presentation at the RISC-V summit in December last year (PDF warning).

Wave Computing has made the first public release under its MIPS Open initiative, announced back in December 2018, though its licence terms lag behind competitors like RISC-V.

Following the sale of MIPS by Imagination Technologies, new owner Wave Computing came up with a plan to boost the popularity of the instruction set architecture (ISA): take on free and open source silicon darling RISC-V head-to-head with MIPS Open, an initiative that would see the company release its latest MIPS core IPs and supporting technologies with no licence or royalty payments required. Now, the company has made good on that promise.

“The Wave Computing team is thrilled to complete the first MIPS Open release, as promised and on schedule, which we see as a key enabler for Wave’s ‘AI for All’ vision,” explains Art Swift, president of Wave Computing’s MIPS IP business unit. “Leveraging decades of R&D and ecosystem investments, today’s launch now enables chip designers to begin development on the latest version of the silicon-proven MIPS architecture without licence fees or royalties. Additional releases are planned, and we fully expect MIPS Open to become the new standard for open use instruction set architectures. Wave is deeply committed to open and shared development initiatives, like MIPS Open and the Berkeley Artificial Intelligence Research (BAIR) project, which we believe accelerate innovation and propel the entire industry into new frontiers.”

The key, here, is “open use”: MIPS Open – which includes 32- and 64-bit versions of the MIPS R6 ISA with various extensions, the MIPS Open Tools toolchain, and an educational programme supported by Verilog and RTL code releases – is available only to developers who register with Wave Computing via the dedicated website, though registration and use of MIPS Open is free of charge under a custom MIPS Open Architecture 1.0 licence which allows for manufacturing or commercialisation only as a “MIPS Open CERTIFIED Independent Core.”

Users are also required to agree to a covenant that they will “perpetually and irrevocably agree that You will not enforce or assert, or authorise or assist any third party (including any affiliate) to enforce or assert, any MIPS Blocking Patents in connection with, or in a manner which in any way limits, hampers or prevents, the use, design, development, modification, enhancement, testing, making, copying, offering to sell, selling, importing and licensing or other distribution, by any MIPS Community Member of (a) MIPS Products or any implementation thereof (whether unmodified or as components of or incorporated in products), and (b) tools pertaining to MIPS Products.”

More information is available on the MIPS Open website, where the first release can be downloaded after registration.

Calista Redmond, newly-appointed chief executive of the RISC-V Foundation, has highlighted the organisation’s key priorities for accelerating adoption and deployment of the open instruction set architecture (ISA) and related technologies.

“With the significant uptick in RISC-V adoption over the past few years, the RISC-V Foundation Technical Committee has made it a priority to prepare the RISC-V base ISA and standard extensions for ratification,” Calista, who was appointed chief executive back in March, explains in a blog post outlining the not-for-profit organisation’s plans. “There are already a wide variety of RISC-V implementations in industry and academia, designed into applications including graphics engines, machine learning and AI, networking, storage, security, embedded and general purpose processors.

“The RISC-V community has now formally agreed on an ISA standard and frozen the ISA, guaranteeing compatibility. This means that software written for RISC-V will run on all similar RISC-V cores forever giving hardware engineers increased flexibility over processor implementation. The RISC-V community has also been hard at work developing a RISC-V compliance framework. This framework tests whether a processor under development meets the open RISC-V standards, which is critically important for companies implementing RISC-V cores in their products.

“I’d like to thank everyone in the RISC-V community for their significant contributions in helping to usher in this new era of processor innovation,” Calista continues. “If you’re not already an active participant, I strongly encourage you to get involved by joining the RISC-V Foundation and participating in a task group. To stay up-to-date on RISC-V developments, you can subscribe to our mailing lists. For me, I’m active on Twitter and LinkedIn so you can follow me on those channels. I’m always available via email at and am happy to schedule time to chat.”

Calista’s full post can be found on the RISC-V Foundation website.

The LLVM project has announced the release of LLVM 8.0.0, which brings with it a wealth of new features including the first support for the open RISC-V architecture in the lld linker.

Released this week, LLVM 8.0.0 includes a range of enhancements to the compiler and toolchain collection. “This release contains the work on trunk up to Subversion revision r351319, plus work on the release branch,” explains Hans Wennborg. “It’s the result of the LLVM community’s work over the past six months, including: speculative load hardening, concurrent compilation in the ORC JIT API, no longer experimental WebAssembly target, a Clang option to initialise automatic variables, improved pre-compiled header support in clang-cl, the /Zc:dllexportInlines- flag, RISC-V support in lld. And as usual, many bug fixes, optimization and diagnostics improvements, etc.”

It’s the last key feature that is of the most interest: while LLVM itself has supported the open RISC-V instruction set architecture since November 2017, the lld linker has not – until lld 8.0.0. The new version of the linker also includes a range of bug fixes, initial support for the MSP430 instruction set architecture, the ability to link against import libraries produced by GNU tools, and automatic importation of data variables from DLLs.

More information on the new features in LLVM 8.0.0 can be found in the release notes, and can be downloaded via the LLVM releases site.

Finally, the Software Package Data Exchange (SPDX) project, the initial standard for which AB Open’s Andrew Back acted as a contributor, has released the latest version of its SPDX Licence List – and it now includes open hardware licences.

Made for ease of reference and to simplify identification of licences and their applied exceptions in documentation, source files, and elsewhere, the SPDX Licence List is now in Version 3.5 and includes both the licences themselves and a list of commonly found exceptions in both human and machine-readable forms. The biggest change: the addition of new licences for open hardware projects.

“Version 3.5 of the SPDX License List is now released,” announced Jilayne Lovejoy via the project’s mailing list. “Most notably, we have added several open hardware licenses (CERN and TAPR), which I think is a really sensible and exciting addition, considering we already have open documentation and data licenses on the list. We are still missing the Solderpad licenses, but those are slated to be added for the 3.6 release.”

The latest version of the SPDX Licence List is available on the project website, along with the machine-readable data files, an overview, matching guidelines, and instructions for requesting that a licence be added to the list.