Tag: RISC-V

Get the latest news on developments in the wider community and topics including wireless, embedded and open source silicon.

Multi-core 64-bit Linux-capable RISC-V Board Unveiled and Available to Pre-order

HiFive Unleashed demonstrated at FOSDEM 2018 running Linux, presentation software and a Quake port, with first boards to ship in around 8 weeks time. In a presentation entitled, Igniting the Open Hardware Ecosystem with RISC-V, we first heard from SiFive’s Palmer Dabbelt, who provided a background to… Read More

Busting the RISC-V ISA Myths

Electronic Design is continuing its 11 Myths series, which covered LoRaWAN last month, with a look at the RISC-V open instruction set architecture (ISA). “Many companies today are exploring free, open-source hardware and software as an alternative to closed, costly instruction set architectures (ISAs). RISC-V is a free, open,… Read More

LowRISC 0.5 Brings First Ethernet Support

The lowRISC project has officially announced the launch of lowRISC 0.5, a milestone release of the popular RISC-V implementation which brings with it open-source Ethernet support. Built upon a RISC-V implementation from the University of California at Berkeley (UC Berkeley), lowRISC 0.5 marks a major milestone release on the… Read More

CRU: RISC-V, LoRa, Movidius, and More

The rise of low-power long-range radio technologies like LoRaWAN has been a boon for the Internet of Things (IoT), but working in radio brings unique challenges – as demonstrated by Embedded.com’s new guide to optimising the performance of embedded radios. Written by Chris Lamb and Rod Williams, the guide… Read More

Future Ships Avalanche FPGA Dev Board with RISC-V Core

Future Electronics has announced the launch of the Avalanche development board, powered by Microsemi’s PolarFire field programmable gate array (FPGA) and shipping with a pre-loaded RISC-V CPU core. “The Avalanche board is the newest addition to our family of development boards. Avalanche is the lowest cost board available in the… Read More

OSDDI: Elkim Roa, OnChip UIS

A modern microntroller or system-on-chip is much more than simply a processor and some digital peripherals, typically integrating a selection of analogue IP also. In this latest episode of Open Source Digital Design Insights we speak with Professor Elkim Roa, Head of the OnChip Group at UIS Colombia, who… Read More

Esperanto Announces 4,112-Core RISC-V AI Chip

Esperanto, a company run by The Case for RISC co-authors Dave Ditzel and Dave Patterson, has announced its first RISC-V products – including a 4,112-core processor aimed at high-performance artificial intelligence (AI) applications. Detailed in full on WikiChip Fuse, Esperanto’s aim is to produce three intellectual property (IP) core… Read More

CRU: PULP Interview, HiFive Unleashed, 3D Printed Sensors, and More

The IoT and sensor network focused Parallel Ultra Low Power (PULP) platform is described as a “silicon-proven parallel platform for ultra-low power computing targeting high energy efficiencies,” and project lead Davide Rossi has been kind enough to walk us through it in our latest Open Source Digital Design Insights… Read More

SiFive, Microsemi Partner for High-End HiFive Unleashed Board

Microsemi and SiFive have announced a partnership that will see the latter join the former’s Mi-V RISC-V ecosystem and the launch of a new development board combining a RISC-V system-on-chip (SoC) with a field programmable gate array (FPGA) for enhanced flexibility. “Microsemi is pleased to welcome SiFive to our Mi-V… Read More

OSDDI: Davide Rossi, PULP Platform

The IoT and sensor network focused Parallel Ultra Low Power (PULP) platform is described as a “silicon-proven parallel platform for ultra-low power computing targeting high energy efficiencies”. It is organised in clusters of RISC-V cores that share tightly coupled data memory and comprised of IPs described in SystemVerilog. The… Read More

Rust Comes to RISC-V

RISC-V architecture gets support for language that enables development of highly concurrent and highly safe systems. The Rust language has a syntax that is similar to C/C++ and is targeted at the development of systems that are both highly concurrent and safe, finding use in everything from a microkernel O/S… Read More

CRU: RISC-V, OpenRISC, LoRaWAN, and More

The Internet Engineering Task Force (IETF) has received a proposal for a cross-vendor standard designed to offer a solid and secure mechanism for updating the firmware of Internet of Things (IoT) devices in the field. Written by Arm engineers Brendan Moran, Milosch Meriac, and Hannes Tschofenig, the draft – titled… Read More