Tag: RISC-V

SiFive Freedom E310 processor

Get the latest news on developments in the wider community and topics including wireless, embedded and open source silicon.

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QEMU 4.0.0 Brings New RISC-V Features

Version 4.0.0 of the QEMU emulator has been released, bringing with it new features for those working with the RISC-V instruction set architecture (ISA). Designed to allow a system to run code designed for a different instruction set, emulation via QEMU or a similar package is a key part of… Read More
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PULP Platform Announces Silicon Labs Partnership

The Parallel Ultra-Low Power (PULP) Platform has announced that Silicon Labs has adopted the platform to extend and customise embedded processor cores in their integrated circuit designs. Now approaching its sixth year, having been launched by Luca Benini at the University of Bologna back in May 2013, the PULP Platform’s… Read More
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RISC-V Workshop Taiwan Slides Now Available

The RISC-V Foundation has published slides from the RISC-V Workshop Taiwan, which took place earlier this month as a means of showcasing the ecosystem and highlighting both ongoing and future projects. “RISC-V Workshop Taiwan showcased the open, expansive and international RISC-V ecosystem, highlighting current and prospective projects and implementations that… Read More