Tag: RISC-V

Get the latest news on developments in the wider community and topics including wireless, embedded and open source silicon.

Gentoo Linux Announces Experimental RISC-V Support

The Gentoo Linux distribution has announced initial, experimental support for the free and open RISC-V instruction set architecture (ISA). “After some preparations, we’re happy to announce (initially experimental) support for a new arch: riscv,” writes Andreas Huettel in the gentoo-dev mailing list. “The keyword is ‘~riscv’; no stable keyword… Read More

QEMU 4.0.0 Brings New RISC-V Features

Version 4.0.0 of the QEMU emulator has been released, bringing with it new features for those working with the RISC-V instruction set architecture (ISA). Designed to allow a system to run code designed for a different instruction set, emulation via QEMU or a similar package is a key part of… Read More

Dover Microsystems Details Shift to Open-Source Renode Framework

Dover Microsystems’ Greg Sullivan has written of how Antmicro’s open-source Renode development framework has considerably decreased the length of his company’s design cycle – showcasing why the framework is becoming increasingly popular. Built with embedded platforms and the Internet of Things (IoT) in mind, Renode allows for the execution, debugging,… Read More

Western Digital Boasts of “Gratifying” SweRV Response, Releases FPGA Reference Design

Western Digital has announced a strong response to the release of its RISC-V based open silicon SweRV Core, along with the availability of an official implementation for field-programmable gate array (FPGA) use. Announced back in December 2018 as part of a company-wide initiative to transition data processing products away… Read More

RISC-V Foundation Finalises Schedule for RISC-V Workshop Zurich

The RISC-V Foundation has released the agenda for its RISC-V Workshop Zurich, to be held on the 11th-13th of June as part of the larger Week of Open Source Hardware (WOSH). Following its call for speakers, which closed back in February, the RISC-V Foundation has firmed up the schedule… Read More

SiFive HiFive1 Board, Courtesy of SiFive

CRU: Open Source Awards 2019, MIPS Open, RISC-V Priorities, and More

Open UK, a membership organisation dedicated to promoting and supporting the use of free and open source standards and software in the UK, has announced a call for nominations for the UK Open Source Awards 2019. “The awards have happened five times in the last 10 years, but not since… Read More

Calista Redmond Outlines “Key Priorities” for the RISC-V Foundation

Calista Redmond, newly-appointed chief executive of the RISC-V Foundation, has highlighted the organisation’s key priorities for accelerating adoption and deployment of the open instruction set architecture (ISA) and related technologies. “With the significant uptick in RISC-V adoption over the past few years, the RISC-V Foundation Technical Committee has made it… Read More

Wave Computing Announces First MIPS Open Release

Wave Computing has made the first public release under its MIPS Open initiative, announced back in December 2018, though its licence terms lag behind competitors like RISC-V. Following the sale of MIPS by Imagination Technologies, new owner Wave Computing came up with a plan to boost the popularity of… Read More

PULP Platform Announces Silicon Labs Partnership

The Parallel Ultra-Low Power (PULP) Platform has announced that Silicon Labs has adopted the platform to extend and customise embedded processor cores in their integrated circuit designs. Now approaching its sixth year, having been launched by Luca Benini at the University of Bologna back in May 2013, the PULP Platform’s… Read More

CRU: Season of Docs, Hardware Compression IP, a SweRV Deep-Dive, and More

Google has announced a new programme, designed to run alongside the Google Summer of Code, through which it aims to improve the quality of documentation in open source projects: the Season of Docs. Google’s Summer of Code (GSoC) is a popular programme through which student developers are partnered with mentor… Read More

Andrew Katz’ Survey of Open Processor Core Licensing Published

Andrew Katz, partner at the law firm Moorcrofts LLP, has published the results of a survey into free and open source silicon (FOSSi) licensing concentrating on processor cores – which includes AB Open’s Andrew Back among its interviewees. Andrew Katz’ report was commissioned by Western Digital, which recently released… Read More

RISC-V Workshop Taiwan Slides Now Available

The RISC-V Foundation has published slides from the RISC-V Workshop Taiwan, which took place earlier this month as a means of showcasing the ecosystem and highlighting both ongoing and future projects. “RISC-V Workshop Taiwan showcased the open, expansive and international RISC-V ecosystem, highlighting current and prospective projects and implementations that… Read More