Tag: Embedded

Get the latest news on developments in the wider community and topics including wireless, embedded and open source silicon.

The Kronos Group Calls for Comments on Heterogeneous Communications Standard

The Khronos Group, best known for its work on the OpenGL and OpenCL graphics and compute language standards, has called for feedback on the potential formation of a working group targeting a new low-level, heterogeneous communications standard for high-performance embedded computing (HPEC). Targeting markets ranging from the Internet of Things… Read More

CRU: Raspberry Pi Goes RISC-V, New FOSS Business Model, KiCon 2019, and More

Wave Computing has announced the MIPS Open initiative, under which it plans to make the instruction set architecture (ISA) available free of charge with no licensing or royalty payments required – a clear response to the growing popularity of the open RISC-V ISA. Wave Computing, which acquired MIPS from Imagination… Read More

SiFive HiFive1 Board, Courtesy of SiFive

CRU: RISC-V Growth, Transprecision Funding, Reverse-Engineering, and More

Princeton University’s OpenPiton free and open source silicon (FOSSi) project has announced what is claimed to be the world’s first open-source, general-purpose, heterogeneous-ISA processor: JuxtaPiton. Built by combining the SPARC v9-based OpenPiton with Clifford Wolf’s PicoRV32 RISC-V core, JuxtaPiton is something unique. “JuxtaPiton inherits all of the capabilities of OpenPiton,… Read More

JEDEC to Release 3D Component Models Alongside 2D Drawings

Microelectronics industry standards organisation JEDEC has announced that it plans to release 3D models of new standard modules, packages, and socket outlines, in addition to the traditional 2D drawings it provides. “The demand for 3D models in electronics design and manufacturing is set to grow exponentially with the expansion of… Read More

CRU: RISC-V Security, GraphQL Foundation, lowRISC 0.6, and More

Esperanto Technologies, a company focused on developing energy-efficient many-core accelerators for artificial intelligence and machine learning applications, has announced the closure of a whopping $58 million in Series B funding – more than 10 times its previous investment rounds combined. “Despite still operating largely in stealth mode, we appreciate this… Read More

RISC-V AI Accelerator Specialist Esperanto Closes $58m Funding Round

CRU: RISC-V Grows Apace, RTOS Vulnerabilities Patched, and More

The IIT Madras SHAKTI Project has celebrated a major milestone this month: the first boot of a RISC-V processor both designed and manufactured within its native India. Launched in 2014 with a focus on IBM’s Power instruction set architecture (ISA) before switching to the open-source RISC-V ISA, the Shakti Project… Read More

Zimperium Warns of Critical FreeRTOS Vulnerabilities

Security researcher Ori Karliner, of Zimperium’s zLabs, has warned of a range of vulnerabilities in the popular open-source FreeRTOS real-time operating system kernel – and with remote code execution possible, developers using the platform are urged to patch. Made available under the MIT Licence, FreeRTOS supports a wide range of… Read More

CRU: RISC-V Design Contest, Radio Spectrum Harmisation, Mbed Linux, and More

The RISC-V Foundation has announced the launch of a design contest, in partnership with Google, Antmicro, and Microchip, which will see entrants competing to build the smallest and fastest RISC-V soft core implementations on field-programmable gate arrays (FPGAs). One of the biggest benefits of free and open source silicon (FOSSi)… Read More

Arm Announces Mbed Linux OS for Cortex-A Parts

Arm’s Mbed division has announced a new operating system to sit alongside its existing Mbed OS: Mbed Linux OS, based on the Linux kernel and tools from the Yocto Project. “My goal has been to extend the benefits of Mbed OS to IoT products that use Cortex-A silicon,” explains Arm’s… Read More

CRU: FOSSi Growth Scares Arm, Verilator 4.0 Launched, and More

Storage giant Western Digital has published full instructions for building the Gnome Desktop variant of the Fedora Linux distribution for RISC-V, targeting the SiFive HiFive Unleashed development board. As part of Western Digital’s push to ship more than a billion RISC-V cores per year, as it moves away from… Read More

Arm Offers Free-as-in-Beer Cortex IP to Combat FOSSi Threat

Cambridge-based processor giant Arm has telegraphed increasing concern regarding the threat from free and open source silicon (FOSSi) cores, offering engineers access to free-as-in-beer Cortex-M intellectual property (IP) in an attempt to keep them within its own ecosystem. That interest in free and open source silicon (FOSSi) has been growing… Read More