Tag: FOSS

SiFive Freedom E310 processor

Get the latest news on developments in the wider community and topics including wireless, embedded and open source silicon.

Microsoft Project Zipline

Microsoft Opens Zipline Hardware-Implementable Compression Algorithm

Microsoft’s cloud computing division, Azure, has announced the release of its hardware-implementable compression algorithm Project Zipline under a permissive licence, as part of the Open Compute project (OCP). “Microsoft’s Project Zipline compression algorithm yields dramatically better results, up to 2X high compression ratios versus the commonly used Zlib-L4 64KB model,”… Read More
SiFive HiFive1 MCU (Cropped)

Amazon Adds RISC-V Support to FreeRTOS Kernel

Amazon has announced that it has added support for the RISC-V open instruction set architecture (ISA) to the MIT-licensed FreeRTOS real-time operating system kernel. “RISC-V is a free and open ISA that was designed to be simple, extensible, and easy to implement. The simplicity of the RISC-V model, coupled with… Read More
SiFive HiFive Unleashed Board

RISC-V Foundation Announces OpenSBI 0.1 Release

An initial implementation of an open supervisor binary interface (SBI) for RISC-V, imaginatively dubbed OpenSBI v0.1, has been released with support for the HiFive Unleashed, Kendryte K210-based development boards, and QEMU virtual machines. “OpenSBI is an open source implementation of the RISC-V Supervisor Binary Interface (SBI). SBI serves a critical… Read More

Semtech Releases Open-Source LoRaWAN Gateway Software

Semtech has announced the release of an open-source packet-forwarder protocol designed for LoRa-connected gateways, and it has partnered with The Things Industries to integrate it into 700 miniature gateways to be distributed at The Things Conference this weekend. “Semtech’s LoRa Technology is enabling the devices, networks and applications (DNA) of… Read More