News

The latest on developments at AB Open and across the wider community.

Ground Electronics' SiFive HiFive Unleashed Case

RISC-V Summit 2018 Highlight Video Celebrates a Banner Year

The RISC-V Foundation has released a video highlighting some of the key features of the 2018 RISC-V Summit, held in Santa Clara late last year and attended by over 1,100 community members. To say that the free and open source silicon (FOSSi) movement in general and RISC-V in particular had… Read More

CRU: Raspberry Pi Goes RISC-V, New FOSS Business Model, KiCon 2019, and More

Wave Computing has announced the MIPS Open initiative, under which it plans to make the instruction set architecture (ISA) available free of charge with no licensing or royalty payments required – a clear response to the growing popularity of the open RISC-V ISA. Wave Computing, which acquired MIPS from Imagination… Read More

Design News Picks 2019 as “The Year of Open Source”

Design News’ Chris Wiltz has predicted that 2019 will be “the year of open source,” and while it’s hard to imagine the impact of open source software getting any greater than it already has it’s clear that the impetus behind open hardware is growing at an exponential pace. In the… Read More

Tidelift Promises a “Better Business Model” for Open Source

Tidelift, a company founded by former Red Hat staff which aims to provide sustainable funding to open source projects, has announced a $25 million Series B funding round – on top of $15 million it raised last year. “Tidelift makes it possible for open source creators to get paid for… Read More

Raspberry Pi Foundation Announces RISC-V Foundation Membership

The Raspberry Pi Foundation has announced its membership of the RISC-V Foundation at the Silver Member tier, offering support for the instruction set architecture on a software – though not yet hardware – level. The original Raspberry Pi launched in February 2012 as a low-cost single-board computer (SBC) primarily targeting… Read More

KiCon 2019 Launches as First KiCad User Conference

The KiCad community is to get its first-ever dedicated conference this year, in the form of KiCon 2019 which is to be held this April in Chicago, USA. Designed to bring together both users and developers of the open-source KiCad electronic design automation (EDA) software suite, KiCon 2019 has been… Read More

VerilogCreator Tunes QtCreator IDE for FPGA Project Use

Engineers working on field-programmable gate array (FPGA) projects and looking for a friendly development environment to add to their toolchain now have a new option: the VerilogCreator plugin for QtCreator. Written by Rochus Keller and brought to our attention by Hackaday, VerilogCreator is designed to turn the QtCreator integrated… Read More

Thales, IIT Madras Partner for Fault-Tolerant SHAKTI RISC-V Processors

Thales, which recently became a member of the RISC-V Foundation, has announced a joint project with IIT Madras to develop a fault-tolerant version of the SHAKTI Project RISC-V CPU. “After the two successful fabrication and booting of SHAKTI with two technology nodes, 22nm (Intel Fab, Oregon USA) and 180nm… Read More

Wave Computing Announces MIPS Open Initiative

Bluespec Launches Commercially-Supported Flute RISC-V Cores

RISC-V specialist Bluespec Inc. has announced its second RISC-V processor design, Flute, which it is making available as basic cores ahead of future releases which will include additional instructions for Linux and FreeRTOS compatibility. The follow-up to Bluespec’s existing Piccolo core, Flute is currently available in RV32IMU and RV64IMASU implementations… Read More

CRU: Free RISC-V Boards, Security in the FOSSi Era, and More

OpenISA has officially launched the VEGAboard microcontroller development board, based on the PULP Platform’s RI5CY and Zero-RI5CY RISC-V core, and it’s giving them away to encourage adoption of the free instruction set architecture (ISA). Developed in partnership with the Parallel Ultra Low Power (PULP) Platform, Express Logic, Foundries.io, Ashling, IAR… Read More

Round-Table Discusses RISC-V, FOSSi Impact on Hardware Security

Semiconductor Engineering’s Ed Sperling has published extracts of a round-table with Rambus’ Helena Handschuh, Microsemi’s Richard Newell, and Galois’ Joseph Kiniry on the impact the open RISC-V instruction set architecture (ISA) can have on security. “With open source, you have the opportunity to review it and come up with comments,… Read More