Author: Gareth Halfacree

Gareth Halfacree is a technology journalist and technical author best known for his work on the Raspberry Pi User Guide and an upcoming book covering the BBC’s micro:bit project. A keen open source advocate and RISC-V fan, Gareth is responsible for curating our fortnightly community round-up posts.

OpenPiton’s JuxtaPiton Processor to get Open-Source i486 Core

Kunal Gulati, working with the OpenPiton Project’s Jonathan Balkind and Katie Lim under the Free and Open Source Silicon Foundation (FOSSi) Google Summer of Code, has announced a project to expand the JuxtaPiton heterogeneous research processor with a third core: ao486. Announced back in November 2018, JuxtaPiton is the… Read More

Microsemi CreativeBoard FPGA development board

RISC-V Foundation Launches Security-Focused Soft-Core CPU Contest

The RISC-V Foundation, in partnership with Microchip Technology and Thales, has announced its second soft-core CPU competition – time time focusing on security. Following on from its first soft-core CPU contest late last year, the RISC-V Foundation has announced its second. Where the first focused on performance and smart… Read More

2019 Wuthering Bytes Festival Day Programme Finalised

The programme for the Wuthering Bytes Festival Day, which headlines a 10 day long celebration of technology in picturesque Hebden Bridge, has now been finalised ahead of its opening on Friday the 30th of August 2019. Since its inception in 2013, Wuthering Bytes has attracted a top-quality collection of technologists,… Read More

Shakti RISC-V Processor Project Releases Public Software Development Kit

The Shakti Processor Project, which has produced India’s first natively-manufactured processor, has publicly released the Shakti Software Development Kit (SDK) – meaning application development for the RISC-V based chips can now begin. Featured in one of AB Open’s Open Source Digital Design Insights (OSDDI) interviews, the Shakti Processor Project… Read More

FOSSi Foundation Announces ORConf Three-Month Countdown

The Free and Open Source Silicon (FOSSi) Foundation has announced the three-month countdown to ORConf, the conference for anyone interested in open-source silicon and the tool chains behind it. “ORConf is in its 8th year of bringing the open source silicon community together for a weekend of presentations, ideas and… Read More

OpenROAD Project Accepting Nominations for Open-Source Community Contribution Awards

The OpenROAD project, the University of California at San Diego’s initiative to reduce the cost, expertise, and risk barriers to hardware design through open-source, has opened nominations for Open-Source Community Contribution Awards. “The OpenROAD project is pleased to announce the establishment of its Open-Source Community Contribution Awards,” the organisation explains… Read More

CRU: Digital FOSSils, RISC-V Growth, Embench Benchmark, and More

AB Open’s Open Source Digital Design Insights (OSDDI) series has expanded with the launch of its first long-form article: Digital FOSSils, a look at the storied history of the free and open-source silicon movement. Today, while the term “free and open source silicon” might not be heard around every water… Read More

Semi Engineering Highlights Growing Industry Interest in Open-Source EDA

Semiconductor Engineering’s Kevin Fogarty has penned a piece on the industry’s increasing interest in open-source electronic design automation (EDA) tools, thanks in no small part to the growth of open hardware projects including RISC-V. “Open-source EDA is back on the semiconductor industry’s agenda, spurred by growing interest in open-source hardware,”… Read More

Digital FOSSils: A History of Free and Open Source Silicon

Today, while the term “free and open source silicon” might not be heard around every water cooler, it’s certainly becoming more common. Projects like RISC-V, which aim to create instruction set architectures which can be used in processors from ultra-low-power microcontrollers all the way up to many-core high-performance computing products,… Read More

Western Digital Partners with SiFive, PlatformIO for Extended Open-Source Dev Toolset

Western Digital has announced a partnership with SiFive and PlatformIO Labs which will see the latter’s embedded development platform extended in order to provide a vendor-agnostic, end-to-end open environment with full RISC-V support. Western Digital’s interest in embedded development in general and the open RISC-V instruction set architecture (ISA) specifically… Read More

Work Continues on Debian Linux RISC-V Port, Documentation Efforts

The Debian Linux distribution’s Manuel Montezelo has written of the progress in porting the distribution to the 64-bit RISC-V architecture, boasting of around a 90 percent package compatibility milestone. Announced back in April 2018, the Debian Linux RISC-V port had a long road ahead of it. At launch, around… Read More

X-FAB, Efabless Announces RISC-V-Based Raven Mixed-Signal SoC

X-FAB Silicon Foundries and Efabless Corporation have announced the creation of a new mixed-signal system-on-chip (SoC) reference design boasting a RISC-V core: Raven. Designed, its creators claim, in just three months, the open-source mixed-signal Raven SoC was built using an open-source tool set put together by Efabless. Its PicoRV32 32-bit… Read More