Tag: FOSSi

Get the latest news on developments in the wider community and topics including wireless, embedded and open source silicon.

CRU: ORConf Countdown, RISC-V News, LoRa Sniffing, and More

We’re now just two weeks away from this year’s ORConf, of which AB Open is a proud sponsor, which is taking place on the 8th through to the 10th of September as part of the Wuthering Bytes technology festival programme in Hebden Bridge, and the list of talks… Read More

OSDDI: OpenRISC, Olof Kindgren

The OpenRISC processor has been around for a good number of years and it has found use in a NASA satellite and Samsung digital televisions, to name just two applications. In this instalment of Open Source Digital Design Insights, long time OpenRISC contributor and open source developer, Olof Kindgren, provides… Read More

OSDDI: SHAKTI Processor, IIT Madras

This latest instalment of Open Source Digital Design Insights is once again from interviews filmed back at ORConf 2015 in Geneva, and this time on the RISC-V based SHAKTI processor from IIT Madras. A project that aims to build 6 processor variants that range from microcontroller up to… Read More

CRU: LoRaWAN fun, RISC-V education, FPGAs, and more

AB Open’s Andrew Back has written of our work on a LoRaWAN gateway for the region, installed on an iconic 275-feet tall landmark with intermittent power. Part of AB Open’s participation in the IoTUK Boost programme, the installation is designed to provide connectivity to The Things Network’s long-range… Read More

Open Source Digital Design Insights Interview with Javier Serrano, CERN

For the second video in the OSDDI series we have an interview with Javier Serrano, leader of the hardware and timing group at CERN, and a driving force behind many of their open source hardware initiatives. Read More

CRU: RISC-V Toolchains, Tiny PCBs, 6502-as-a-Service, and More

Developer Liviu Ionescu has published the results of RISC-V toolchain testing, comparing the GNU MCU Eclipse toolchain to the GCC-based toolchain from SiFive across four configurations. “After releasing GNU MCU Eclipse RISC-V Embedded GCC, I tested if the strategy used while building it is effective,” Liviu explains of his… Read More

CRU: RISC-V Calls for Papers, Industrial Hardware, Equipment Hacking, and More

Calls for papers have gone out for the 7th RISC-V Workshop and the first Workshop on Computer Architecture Research with RISC-V (CARRV), both to be held in the US later this year. The 7th RISC-V Workshop, its organisers have confirmed, is to take place on the 28th to the 30th… Read More

Community Round-Up: RISC-V Progress, Amazon Greengrass, Wuthering Bytes and More

Developer Palmer Dabbelt has submitted a RISC-V port of glibc, the GNU C Library, for upstream inclusion and is actively working with others on a patch set for the Linux kernel with a view to mainline acceptance by Linux 4.14. While the open RISC-V instruction set architecture (ISA) has… Read More

Community Round-Up: RISC-V Workshop Proceedings, Open Virtual Platforms, Cortus’ Core, Arduino Cinque, MinnowBoard Turbot, PIC32MZ with GPU, ARM Cortex-A75, Cortex-A55, Intel Compute Cards, Doubling PWM Resolution, and Gordon Williams on Open Source Challenges

The RISC-V Foundation has publicly published the proceedings of the 6th RISC-V Workshop, held early last month in Shanghai, China. Video and, where appropriate, slide decks have been made available from the three public days of the four-day event. Highlights include updates from Rick O’Connor and Yunsup… Read More

Community Round-Up: RISC-V GCC, Book, Workshop and Licensing, Mentoring GSOC, Linux 4.11 and EdgeX, BrickerBot, and an Open-Source Rigol Firmware

The GNU Compiler Collection (GCC) has hit version 7.1 and now includes support for the RISC-V instruction set architecture (ISA), three decades after the toolkit’s initial 1.0 release. That support for the burgeoning RISC-V open instruction set architecture was coming to GCC was no secret, following the acceptance by the… Read More

Open Source Digital Design Insights launches with Krste Asanović interview

With the groundswell of interest in open source digital design in recent years we decided to take the opportunity to chat with some of the key people involved in this fast growing movement, working in association with the Free and Open Source Silicon Foundation to produce the Open Source… Read More

Community Round-Up: RISC-V Improvements, Caffe2, PCBA Visualisation, Solar Supercapacitors, Arduino Sigfox, Intel Developer Forums, IoT Requirements Guide, and the Vinduino LoRa Project

Researchers at Princeton University have helped boost the robustness of the burgeoning RISC-V architecture, having developed a tool which has picked up on data storage and retrieval ordering problems that could otherwise have derailed attempts to use it in high-reliability applications. “Incorrect memory access orderings can result in software… Read More