Author: Gareth Halfacree

Gareth Halfacree is a technology journalist and technical author best known for his work on the Raspberry Pi User Guide and an upcoming book covering the BBC’s micro:bit project. A keen open source advocate and RISC-V fan, Gareth is responsible for curating our fortnightly community round-up posts.

Linux Foundation Launches Community Data Licence

The Linux Foundation has announced the launch of the Community Data Licence Agreement (CDLA), which it claims makes it easier for organisations and individuals to share, analyse, and use data collaboratively. “An open data license is essential for the frictionless sharing of the data that powers both critical technologies and… Read More

FireSim Brings RISC-V to Amazon’s AWS Platform

Researchers at the University of California at Berkeley RISE Lab have released FireSim, an open-source cloud instance of RocketChip RISC-V processors running on the Amazon Web Services (AWS) platform. “FPGA-accelerated hardware simulation is by no means a new concept. However, previous attempts to use FPGAs for simulation have been fraught… Read More

Microsemi Launches Mi-V Ecosystem

Microsemi has announced it is to help push RISC-V adoption through Mi-V, a new ecosystem which gives those developing on the open architecture full tier-one vendor support from the top down. “As a leader in RISC-V, we are pleased Microsemi is the first tier one vendor to build out a… Read More

CRU: LMS8001 Companion, Security Alerts, 14nm RISC-V, and More

The LimeSDR open-source software defined radio (SDR) project has received a boost, quite literally, in the form of the frequency-extending LMS8001 Companion Board, announced as part of the LimeSDR Mini crowdfunding campaign. Built around a Lime Microsystems LMS8001 frequency shifter chip, the Companion Board allows any LimeSDR module –… Read More

CRU: Floods, RISC-V for Linux, Iron-Scopes and More

AB Open has announced a partnership with Flood Network to bring a series of Internet of Things (IoT) river level sensors to the Upper Calder Valley, providing valuable flood warning data for the region. Joining the users of the Things Calderdale LoRaWAN network, the flood sensors are to… Read More

CRU: RISC-V Growth, Job Vacancies, and More

Cambridge-based semiconductor specialist UltraSoC has announced its expansion into Bristol, and it’s giving credit for its recent growth to an explosion of interest in the open-source RISC-V instruction set architecture (ISA). “There’s a perfect storm of factors revolutionising the technology business from top to bottom,” says Rupert Baines, UltraSoC’s… Read More

CRU: LoRa Bat Watching, RISC-V Updates, Neural Networks, and More

AB Open’s Andrew Back has written up a project to create a bat detector with LoRaWAN connectivity, transmitting data on bat call measurements via The Things Network using MQTT. “When ODI Leeds recently said that they were interested in LoRaWAN-enabled bat detection, we thought, ‘What a fun idea, let’s… Read More

CRU: ORConf Countdown, RISC-V News, LoRa Sniffing, and More

We’re now just two weeks away from this year’s ORConf, of which AB Open is a proud sponsor, which is taking place on the 8th through to the 10th of September as part of the Wuthering Bytes technology festival programme in Hebden Bridge, and the list of talks… Read More

CRU: LoRaWAN fun, RISC-V education, FPGAs, and more

AB Open’s Andrew Back has written of our work on a LoRaWAN gateway for the region, installed on an iconic 275-feet tall landmark with intermittent power. Part of AB Open’s participation in the IoTUK Boost programme, the installation is designed to provide connectivity to The Things Network’s long-range… Read More

CRU: RISC-V Toolchains, Tiny PCBs, 6502-as-a-Service, and More

Developer Liviu Ionescu has published the results of RISC-V toolchain testing, comparing the GNU MCU Eclipse toolchain to the GCC-based toolchain from SiFive across four configurations. “After releasing GNU MCU Eclipse RISC-V Embedded GCC, I tested if the strategy used while building it is effective,” Liviu explains of his… Read More

CRU: RISC-V Calls for Papers, Industrial Hardware, Equipment Hacking, and More

Calls for papers have gone out for the 7th RISC-V Workshop and the first Workshop on Computer Architecture Research with RISC-V (CARRV), both to be held in the US later this year. The 7th RISC-V Workshop, its organisers have confirmed, is to take place on the 28th to the 30th… Read More

Community Round-Up: RISC-V Progress, Amazon Greengrass, Wuthering Bytes and More

Developer Palmer Dabbelt has submitted a RISC-V port of glibc, the GNU C Library, for upstream inclusion and is actively working with others on a patch set for the Linux kernel with a view to mainline acceptance by Linux 4.14. While the open RISC-V instruction set architecture (ISA) has… Read More