The CHIPS Alliance, a Linux Foundation-backed consortium for free and open source silicon (FOSSi) efforts, has announced in inaugural workshop for the 19th of June at Google’s Sunnyvale, California facility.
Launched back in March, the CHIPS Alliance includes among its founding members Google, Western Digital, Esperanto, and SiFive, all but one of which has announced or shipped products based on the open RISC-V instruction set architecture (ISA). Its first workshop will, its organisers claim, provide project details, strategies, and roadmaps from member companies, while attendees will be given the opportunity to propose register transfer level (RTL) projects and ideas for improving development flow.
“This workshop at Google will kick off CHIPS Alliance hardware RTL development,” explains Western Digital’s Dr. Zvonimir Bandic, chair of the CHIPS Alliance Foundation. “The organisation will discuss the planned projects, what is needed for accelerated open source hardware and key software tools. Attendees will see the potential of CHIPS Alliance and the vision for what we will deliver.”
“Workshop attendees will learn more about our organisation and the open source hardware, verification flows/tools and software we will be developing. Attendees will also have an opportunity to suggest projects and meet with CHIPS Alliance members and the Board of Directors,” adds Google’s Dr. Richard Ho, board member of the Foundation. “We look forward to answering questions, discussing ideas and sharing the aspirations of the group.”
The confirmed agenda sees talks on the Federation open-source chip design workflow, a collaborative end-to-end design verification flow, an update on the BooM v2 project and the Blue Cheetah framework, alongside a look at open-source tools including cocotb, Chisel, FIRRTL, and FuseSoC.
More information about the event is available on the CHIPS Alliance website.