The free and open-source silicon (FOSSi) ecosystem continues to grow, and nowhere will that growth be more obvious than at the Embedded World 2019 conference this year where 17 companies will be exhibiting RISC-V implementations and supporting technologies alone.
Due to take place at the NürnbergMesse, Germany, from Tuesday the 26th of February to Thursday the 28th of February, Embedded World 2019 is to play host to a booth from the RISC-V Foundation which will include pods from members Andes Technology, CloudBEAR, GreenWaves, IMperas, SiFive, Syntacore, and UltraSOC. Given that a few short years ago RISC-V, and FOSSi in general, was largely confined to the lab, that’s impressive enough – but other RISC-V members AdaCore, Antmicro, Ashling Microsystems, Cortus, IAR Systems, Microchip Technology, Silicon Labs, Sysgo, Trinamic Motion Control, and Western Digital have their own booth as well, for a total of 17 companies exhibiting RISC-V products and services.
As a further indicator of interest in RISC-V, the schedule is packed with speaking sessions ranging from NXP Semiconductors’ Robert Sohana on a practical industry approach to getting started with RISC-V and Trinamic’s Onno Martens on his company’s hands-on experience with embedded a RISC-V core into a new system-on-chip (SoC) design to talks on RISC-V’s impact on security models and heterogeneous designs alongside proprietary Arm cores. A particular highlight will be a talk from Western Digital’s Dr. Zvonimir Bandic on the company’s recently-released SweRV Core RISC-V design.
If that weren’t enough, the schedule includes two workshops on building a RISC-V embedded system in just 30 minutes, run by Cesare Garlati of the prpl Foundation and Drew Barbier of SiFive, an expert panel on opportunities and risks in open-source processors, and a look at Renode for design-cycle acceleration.