Researchers from the Massachusetts Institute of Technology (MIT), working with Analog Devices, have announced the production and execution of the world’s first 16-bit programmable processor built around carbon nanotube field-effect transistors (CNFETs) – and they’ve implemented the open RISC-V instruction set architecture (ISA) on it.
One of a range of materials under investigation for the post-silicon era of semiconductors, in order to keep up with the observation turned target by Intel co-founder Gordon Moore that the number of transistors on a leading-edge part trends towards a doubling every 18 months, carbon nanotube transistors (CNTs) have the potential to operate with considerably higher efficiency than their silicon counterparts. The only problem: a high defect rate in production, meaning that previous cutting-edge CNT processors have been limited to fewer than 150 transistors per prototype.
A team of researchers at MIT, working under Professor Max M. Shulaker, have now made a breakthrough: DREAM, Designing Resiliency Against Metallic CNTs, a technology which has allowed them to produce a 16-bit CNFET processor with 14,000 transistors and implementing the open RISC-V instruction set architecture.
“This is by far the most advanced chip made from any emerging nanotechnology that is promising for high-performance and energy-efficient computing,” says Professor Shulaker of RV16XNano, which has been produced in prototype form and is already executing its first programs. “There are limits to silicon. If we want to continue to have gains in computing, carbon nanotubes represent one of the most promising ways to overcome those limits. [This paper] completely re-invents how we build chips with carbon nanotubes.”
Full details on the team’s work, which marks both the first 16-bit programmable carbon nanotube processor and the first carbon nanotube chip to be based on the research-friendly open RISC-V ISA, can be found in the journal Nature.