Huami, a subsidiary of Chinese electronics specialist Xiaomi, has announced a new family of smartwatches and fitness wearables, and in doing so is set to become the first company to bring a product based on the open RISC-V instruction set architecture (ISA) to the consumer market.
Announced by Huami at its technology event in Beijing this week, the Huangshan No. 1 system-on-chip (SoC) is based on the SiFive E31 processor core intellectual property (IP), which is itself based on the open RISC-V instruction set architecture (ISA). To launch in Amazfit-branded smartwatch and fitness band wearable devices, the Huangshan No. 1 features the SiFive E31 as its main processor, operating alongside an always-on (AON) module designed to transfer sensor data to internal static RAM without waking the primary processor, plus dedicated accelerators for neural network workloads.
During the event, Huami described RISC-V – which began life just eight years ago at the University of California, Berkeley, and which requires no expensive licensing in order to develop open- or closed-hardware implementations – as “the processor architecture of the era,” stating that it is “very suitable for small embedded systems and the Internet of Things (IoT).”
“This is a milestone,” SiFive chief architect and RISC-V Foundaiton chair Krste Asanovic says of the new processor. “The cooperation between Huami Technology and SiFive brings RISC-V technology to humans, on their wrist.”
Huami may be the first to market with a RISC-V consumer product, but it’s not likely to be alone for long: SiFive chief executive and president Naveed Sherwani has stated that “more innovative products featuring SiFive technology” will be announced soon, though has not yet provided details.
More information is available in Huami’s product announcement.