Bootlin’s Michael Opdenacker has published a guide to getting started with embedded Linux on RISC-V in just 40 minutes, as part of a presentation given during the Capitole du Libre 2019 event earlier this month.
Building on a presentation first given at the Libre Software Meeting 2005, in which Opdenacker demonstrated how to get Linux 2.6 up and running on a QEMU-emulated Arm device in under 40 minutes, the new presentation was triggered by a range of changes – including the order-of-magnitude reduction in cost of entry-level development boards, increasing popularity of free and open hardware, and most particularly the launch of the free and open RISC-V instruction set architecture (ISA).
The presentation walks the audience through setting up the QEMU emulator, thus avoiding the need to have dedicated hardware for testing, a Buildroot cross-compilation toolchain, the Berkeley Boot Loader (BBL), the Linux 5.4-rc7 kernel, and the BusyBox root filesystem and application bundle – providing a functional Linux system running on RISC-V in under 40 minutes and with no specialist hardware required.
“What to remember,” Opdenacker writes in conclusion. “Embedded Linux is easy. It makes it easier to get started with Linux. You just need a toolchain, a kernel and a few executables. RISC-V is a new, open Instruction Set Architecture, support it! In embedded Linux, things don’t change that much over time. You just get more features.”
The presentation full slide deck, which provides both the instructions to get started yourself along with explanations of what each step of the process is for, is available to download now under the Creatice Commons BY-SA 3.0 licence from the Bootlin website.
Olof Kindgren, director of the Free and Open Source Silicon Foundation (FOSSi Foundation), has released a tool designed to make multi-sensor aggregation on field-programmable gate arrays (FPGAs) simpler: the RISC-V-powered Observer.
“Implementing the logic for sensor communication, post processing and format conversion directly in an FPGA can quickly become very time-consuming. This is a task much better suited for a CPU,” Kindgren explains of the project. “On an FPGA it’s no problem to add a soft CPU, but the more sensors that are connected to the CPU, the harder it will have to keep up with any real-time aspects of the data collection.
“Observer deals with this by attaching a CPU to each sensor interface that handles all bring-up and data collection from the sensor and produces a well-formed data packet which is then forwarded to a common aggregation node.”
The Observer platform is built on free and open-source silicon: a Collector, which interfaces directly with each sensor over whatever protocol is required, connects to a Base via the open Wishbone interconnect standard; each Base includes a compact SERV RISC-V CPU core given the task of controlling data flow and sending the data to a shared Emitter via an AXI stream; the Emitter contains another SERV core and aggregates all incoming data for transmission over a UART serial bus.
“This has a number of benefits,” Kindgren explains of the approach. “Data collection and post-processing from each sensor can be done completely independent of the others. It allows for power savings by doing complex data reduction very close to the sensor and allowing unused nodes to shut down when not in use. Depending on the complexity of the sensor interfacing or post processing, each node can independently decide to do this using a couple of lines of assembly code, a bare-metal C program or even run a RTOS such as Zephyr.”
Observer is available now on Kidngren’s GitHub repository.
Martin Strubel has released a guide to running a RISC-V core directly in a browser – though admits that it’s unsurprisingly not quite as performant as if it were running in a native emulator or on dedicated hardware.
“I though I’d share some open source approach to let a RISC-V spin in the cloud – a few 1000 times slower than reality, but still fast enough to run the ISA tests and – for fun – to talk to the SoC through a virtual UART,” Strubel writes in a post to the RISC-V hardware developers’ mailing list. “Thanks to the docker community, this can all run in the browser without having to install a lot of software (let aside resolving dependencies).
“The other good thing is that this integrates nicely into GitHub so that when breaking stuff during development, this will show. The actual engine behind it is the open source GHDL simulator. So the entire thing is pretty VHDL specific, however with a bit of work this could also done with licence-free Verilog simulators – which would be nice to have someday, to do synthesis the ‘open source continuous integration’ way as well (with Yosys).”
Designed primarily for continuous integration (CI), instructions on getting Strubel’s Docker image up and running for in-browser RISC-V experimentation can be found on the Section 5 website.
Intel’s Movidius family of vision processing units (VPUs) for artificial intelligence at the edge has a new member, codenamed Keem Bay, which promises a tenfold performance improvement over the previous generation.
Brought into Intel’s stable with the acquisition of computer vision startup Movidius in 2016, the Movidius Vision Processing Unit (VPU) range is designed to provide high-performance acceleration of computer vision and other artificial intelligence workloads in a low power envelope for edge devices. Since launch, the Movidius Myriad range has powered drones and been the focus of a programme to bring edge AI devices to production.
Back in November last year, Intel unveiled the successor to its USB-connected Neural Compute Stick accelerator, the Neural Compute Stick 2, claiming that the Myriad X part at its heart offers eight times the performance of the Myriad VPU in the original. Now, the company has unveiled Keem Bay – and promises a tenfold improvement over the Myriad X.
Impressively, Intel is claiming that it can beat rival Nvidia’s GPU-based edge-AI accelerators, offering four times the performance of Nvidia’s TX2 and equal performance with the Nvidia Xavier – but in a fifth the power envelope.
Intel’s Keem Bay will launch in the 1H2020, the company has confirmed, in PCI Express and M.2 form factors – though the company is so far quiet on pricing and availability of a USB-based accelerator to replace the Neural Compute Stick 2.
Wave Computing has officially shuttered its MIPS Open programme, providing “open use” to selected MIPS core IP and the underlying instruction set architecture, less than a year after the initiative was launched – and with zero advance warning.
Wave Computing, which acquired the rights to the proprietary MIPS ISA and core IP from Imagination Technologies in mid-2018, announced the MIPS Open Initiative back in December last year. “Having spent years in the open source technology movement, I can attest to the hunger for community-driven solutions,” Wave Computing’s Art Swift claimed at the time. “However, until now, there has been a lack of open source access to true industry-standard, patent-protected, and silicon-proven RISC architectures. The overwhelmingly positive response we have received thus far from customers on our MIPS Open initiative is an indication of the dramatic, positive impact we believe the program will have on the industry. We invite the worldwide community to join us in this exciting journey and look forward to seeing the many MIPS-based innovations that result.”
The actual release of anything under MIPS Open, however, wouldn’t take place until March this year – and it would come under a custom licence which included onerous restrictions on exactly what a MIPS Open user can and cannot do with the IP provided. Accordingly, its adoption has been slow – which is just as well, given that as of late yesterday the programme has been shuttered and the MIPS ISA returned to its prior proprietary status.
In an email sent to registered MIPS Open members last night, Wave Computing’s legal department advised that the MIPS Open Initiative was to shutter with immediate effect. All previously-available downloads have been removed from the MIPS Open website, and all MIPS Open accounts closed with no warning. Although the company has stated it will continue to honour existing licensed downloads and related certifications, it advises that it will “no longer provide maintenance or support” – and requires anyone currently using MIPS Open to email it on firstname.lastname@example.org within 30 days of the the notification to remain licensed and certified.
While the move may not be surprising overall – while relatively popular in its proprietary form, MIPS Open uptake has been extremely slow in comparison to far more open rivals like RISC-V and OpenSPARC – Wave Computing’s decision to withdraw everything with zero notice is certainly unusual, and leaves anyone who had been working on MIPS Open projects in a sticky situation.
The KiCad electronic design automation (EDA) project has officially joined the Linux Foundation, a move which its maintainers say will allow it to grow its community and ensure the long-term stability of the project.
“KiCad is a set of applications used by engineers focused on board design,” explains Michael Dolan, vice president for strategic programmes at the Linux Foundation. “It’s a professional and free piece of software that gives engineers the freedom to use the software anywhere and across any platform, not tying them to specific hardware architectures. Its progress in creating an integrated environment for schematic capture and PCB layout design has been massive and the Linux Foundation’s infrastructure and governance model will give it the required support to sustain that growth for the long term.”
“We’ve seen the program skyrocket in use over recent years, with some board vendors reporting more than 15 percent of new board orders designed using KiCad,” adds Wayne Stambaugh, lead of the KiCad project. “To accommodate this rate of growth there was a need to re-evaluate our revenue support model to help us attract more people to the project. Under the Linux Foundation we will have increased flexibility to spend donations to help move the project forward as well as an increased exposure to potential new donors.”
The partnership will see KiCad, first launched in 1992, adopted as an official Linux Foundation Project and participating in the CommunityBridge platform – an effort launched by the Linux Foundation earlier this year to connect open-source developers and both individual and organisational supporters for sustainable project funding.
More information on the partnership, and KiCad itself, can be found on the official website.
The Barcelona Supercomputer Centre (BSC) has announced the opening of the European Laboratory for Open Computer Architecture (LOCA), which aims to develop both energy-efficient and high-performance chips based on open instruction set architectures (ISAs).
“LOCA will be a collaborative laboratory that welcomes companies, foundations and academic institutions that share the vision that it is necessary to create open architectures to guarantee transparency, competitiveness, and technological sovereignty,” claims Professor Mateo Valero, director of the BSC. “We are launching it with great conviction, because it is another step in our philosophy of paving the way for the creation of European HPC architectures, as we did in the past with the Montblanc project, creating a clusters based on ARM processors and we are currently doing in the EPI project by developing the general software stack and a RISC-V accelerator in the Arm-based multicore chip.”
The objectives for LOCA focus on the development of processors based on open architectures including RISC-V, OpenPOWER, and MIPS. “We envision a future that is wide open, incorporating open source software and hardware,” says Dr. John Davis, who will head LOCA for BSC. “LOCA is a mechanism to extend the success of OSS, like Linux, to the hardware domain. We can no longer rely on Moore´s Law for dramatic improvements in CPU performance. To unlock the potential energy efficiency and performance of future systems, we must use hardware/software co-design, enabled by an open hardware and open software ecosystem. LOCA’s inaugural five-year plan focuses on developing and building key open European-made IP as a basis for future Exascale and beyond systems.”
More information is available from the official announcement.
The European Commission is to host the Open Source Beyond 2020 workshop on the future of open source hardware and software next week, featuring a panel on the advent of open source hardware and the Internet of Things chaired by the head of the Competitive Electronics Industry DG Connect A3 Unit Colette Maloney.
“Open Source has become mainstream across all sectors of the software industry during the past 10 years,” the Commission writes of the event. “To a large extent, open software re-use has proven economically efficient. The level of maturity of Open Source Hardware (OSH) remains far lower than that of Open Source Software (OSS). However, business ecosystems for OSH are developing fast so that OSH could constitute a cornerstone of the future Internet of Things (IoT) and the future of computing.
“There are questions that are pertinent to be asked with regard to the future of OSS and OSH: Is the dramatic expansion of Open Source Software going to continue? Where is the limit? Will Open Source Hardware follow the path of its sibling? In November 2019, the European Commission will be organising a workshop to analyse the future of Open Source Software and hardware. The workshop will bring stakeholders together to discuss current challenges, opportunities, R&I and also economic and policy-making issues. More specifically, the workshop will focus on: the role of Open Source as innovation enabler; how Open source can contribute towards the technological independence of Europe; open source in the industry and the public sector.”
The event opens with a panel on the role of open source as an innovation enabler before another on open source hardware and the IoT featuring input from the Barcelona Supercomputing Centre, ETH Zurich, Texas Instruments, the Fraunhofer Institute for Laser Technology, and two universities. A further panel is set to discuss open source in the manufacturing industry, while another investigates how to lower the barriers to entry for small and medium enterprises providing open source services to the public sector – and there are additional sessions throughout the two-day event.
The Workshop on Open Source Design Automation (OSDA), now on its second year, has announced a call for contributions with a deadline of the 12th of January 2020 – and is, as with the year before, taking place at the Conference on Design, Automation, and Test in Europe (DATE).
“There is no doubt that proprietary EDA [Electronic Design Automation] tools are successful, mature, and are fundamental for hardware development,” write workshop organisers Clifford Wolf and Christian Kreig. “However, the ‘walled garden’ approach created by closed-source toolflows can hamper novel FPGA-based applications and EDA innovation alike by requiring that researchers either operate within the limits of what has already been imagined, or require that they attempt to simulate their effects on incomplete models, potentially leading to incorrect conclusions. For such an off-the-shelf field-programmable technology, unlike fixed-function ASICs, this seems like a lost opportunity.
“This workshop intends to provide an avenue for industry, academics, and hobbyists to collaborate, network, and share their latest visions and open-source contributions, with a view to promoting reproducibility and reusability in the design automation space,” the pair continue. “DATE provides the ideal venue to reach this audience since it is the flagship European conference in this field – particularly poignant due to the recent efforts across the European Union (and beyond) that mandate ‘open access’ for publicly funded research to both published manuscripts as well as software code necessary for reproducing its conclusions. A secondary objective of this workshop is to provide a peer-reviewed forum for researchers to publish ‘enabling’ technology such as infrastructure or tooling as open-source contributions – standalone technology that would not normally be regarded as novel by traditional conferences – such that others inside and outside of academia may build upon it.”
The call for participation asks for submissions relating to open-source FPGA tools, open-source IP for FPGAs, design methodologies provided under open-source licensing terms, roadmaps suggesting where the open-source FPGA movement should focus its efforts, and discussions and case studies on licensing, funding, and commercialisation of technologies based on open-source hardware.
The workshop is scheduled for the 13th of March in Grenoble, France, as part of the Conference on Design, Automation, and Test in Europe 2020 (DATE 2020); submissions should be made by the 12th of January, with successful applicants to be notified of their acceptance by the 19th of January. More information on the workshop, and a link to submit a proposal, can be found on the official website.
Finally, The Things Network has announced what it promises will be the “world’s largest LoRaWAN event,” The Things Conference, to take place late January 2020 in Amsterdam.
Designed for administrators of, users of, and those just interested in the community-driven The Things Network global LoRaWAN initiative as well as the LoRaWAN long-range low-power radio access network technology itself, The Things Conference is being organised by The Things Network to bring together its community of more than 100,000 developers globally.
Confirmed participants in the Conference, aside from The Things Network itself, include LoRa Alliance, Semtech, Microsoft, Laird, Murata, Bosch, and others. Over the two-day schedule, representatives will be presenting on a range of topics – including LoRa inventor Nicholas Somin, LoRa Alliance chair Donna Moore, and former chief software architect for Microsoft Ray Ozzie.
Those interested in attending the event, which is to be held on the 30th and 31st of January 2020, can find more information on the official website, while tickets can be purchased at a ten percent discount using the code “FRIEND-OF-ABOPEN.”