Antmicro has announced the release of FastVDMA, an open-source direct memory access (DMA) controller designed to improve the freedom of FPGA-based free and open source silicon projects.

“One of the main motivations leading to the design of an open source DMA controller was the lack of portable open source alternatives to proprietary controllers provided by FPGA vendors,” the company explains in its announcement. “This situation leads to a reduction in the reusability of DMA-based designs into different contexts when adopting multiple kinds of platforms, since DMA solutions tend to be tightly integrated with vendor-specific toolchains and IP. As a result, a non-negligible part of the work required in creating designs that implement proprietary DMA controllers, ends being highly platform-dependent and less useful to developers using other platforms.

“At Antmicro, we strongly advocate cross-platform and reproducible solutions to our customers, and are often the first to identify both immediate and long-term vendor lock-in constraints. The integration of FastVDMA with a portable SoC, such as LiteX, would solve the portability and platform-dependence of any DMA-based designs, and so allow for more engineering freedom in our FPGA projects.”

Antmicro’s solution, FastVDMA, supports multiple bus types – AXI4, AXI-Stream, and Wishbone – as write or read front-ends, supporting memory-to-memory, memory-to-stream, and stream-to-memory transfers without loading the CPU. Designed using the Chisel hardware design language, FastVDMA is claimed to be designed for minimal resource utilisation in order to make it as portable as possible which having been verified on hardware at 750MB/s for a 250MHz clock and 330MB/s at a 100MHz clock.

More information on FastVDMA is available on the Antmicro website and the project’s GitHub repository, where it is made available under the permissive MIT Licence.