Open silicon specialist SiFive has announced another win for its DesignShare platform with Analog Bits, provider of low-power mixed signal intellectual property, adding its precision clocking macros into the mix.

Designed to make it simpler for start-ups to build custom silicon by bringing together as much of the IP required to design a system-on-chip (SoC) as possible, DesignShare has enjoyed some high-profile success of late. Earlier this month Flex Logix announced it was adding its embedded field-programmable gate array (eFPGA) technology to the platform, while back in August Rambus did the same with its security tech – and now Analog Bits has joined the fold.

“For two decades Analog Bits has been an important supplier of low-power IP for use in SoC devices and helped spawn the mobile and computing revolution,” says Mahesh Tirupattur, executive vice president, of the company. “Through DesignShare, we hope to empower more system developers and provide them with the competitive edge they need to deliver innovative SoC products in a timely manner.”

“The addition of Analog Bits to the DesignShare ecosystem provides engineers with a faster and more efficient way to bring SoCs to market,” adds Shafy Eltoukhy, SiFive’s lead on the DesignShare programme. “The adoption of the RISC-V architecture continues to experience significant growth, and with Analog Bits as part of the DesignShare movement it will be easier and more flexible for designers to employ RISC-V in their future designs across a wide range of implementations.”