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Calderdale's LoRaWAN Gateway

CRU: LoRaWAN fun, RISC-V education, FPGAs, and more

AB Open’s Andrew Back has written of our work on a LoRaWAN gateway for the region, installed on an iconic 275-feet tall landmark with intermittent power. Part of AB Open’s participation in the IoTUK Boost programme, the installation is designed to provide connectivity to The Things Network’s long-range radio wide-area network (LoRaWAN) as Things Calderdale….

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SiFive RISC-V processor

CRU: RISC-V Toolchains, Tiny PCBs, 6502-as-a-Service, and More

Developer Liviu Ionescu has published the results of RISC-V toolchain testing, comparing the GNU MCU Eclipse toolchain to the GCC-based toolchain from SiFive across four configurations. “After releasing GNU MCU Eclipse RISC-V Embedded GCC, I tested if the strategy used while building it is effective,” Liviu explains of his experiments, which saw the SiFive example…

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Intel Compute Card

Community Round-Up: RISC-V Workshop Proceedings, Open Virtual Platforms, Cortus’ Core, Arduino Cinque, MinnowBoard Turbot, PIC32MZ with GPU, ARM Cortex-A75, Cortex-A55, Intel Compute Cards, Doubling PWM Resolution, and Gordon Williams on Open Source Challenges

The RISC-V Foundation has publicly published the proceedings of the 6th RISC-V Workshop, held early last month in Shanghai, China. Video and, where appropriate, slide decks have been made available from the three public days of the four-day event. Highlights include updates from Rick O’Connor and Yunsup Lee on the RISC-V Foundation and RISC-V Technical…

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Sysmocom 3.5G Starter Kit

Community Round-Up: Sysmocom 3.5G Kit, Shrinking Linux, MIPS for Sale, Google’s Open Source Site and TPU Cloud, Signal/Power Isolation, Microsoft on IoT Security, and Kickstarter’s Hardware Studio

Open source cellular specialist Sysmocom has announced a limited-edition kit offering an all-in-one 3.5G cellular network with base station, femtocell, and ten pre-provisioned SIM cards. Offering an open platform and designed for everything from Internet of Things (IoT) network deployments to local or extended voice network coverage, the SysmoNITB 3.5G kit is based around the…

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SiFive HiFive1 Development Board

Community Round-Up: RISC-V GCC, Book, Workshop and Licensing, Mentoring GSOC, Linux 4.11 and EdgeX, BrickerBot, and an Open-Source Rigol Firmware

The GNU Compiler Collection (GCC) has hit version 7.1 and now includes support for the RISC-V instruction set architecture (ISA), three decades after the toolkit’s initial 1.0 release. That support for the burgeoning RISC-V open instruction set architecture was coming to GCC was no secret, following the acceptance by the GCC Steering Committee of a port…

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SiFive RISC-V processor

Community Round-Up: RISC-V Improvements, Caffe2, PCBA Visualisation, Solar Supercapacitors, Arduino Sigfox, Intel Developer Forums, IoT Requirements Guide, and the Vinduino LoRa Project

Researchers at Princeton University have helped boost the robustness of the burgeoning RISC-V architecture, having developed a tool which has picked up on data storage and retrieval ordering problems that could otherwise have derailed attempts to use it in high-reliability applications. “Incorrect memory access orderings can result in software performing calculations using the wrong values,”…

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Nordic Semiconductors' nRF52832

Community Round-Up: Bluetooth 5 in Apache Mynewt, Microsoft’s Sopris MCU and CodePlex Closure, ARM Compute Library, Canonical’s IoT Push, Embedded World Videos, Sinclair Spectrum Flashing, and Bomb Squad Academy

The Apache Mynewt open-source embedded operating system has received support for Bluetooth 5, Runtime has announced during the Bluetooth World 2017 conference, with ports already under test for the Nordic Semiconductor nRF52832 and nRF52840 system-on-chips (SoCs). “Last year at Bluetooth World 2016, Runtime announced the world’s first open source, controller-level BLE protocol stack for microcontroller-class (MCU)…

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ARM DynamIQ

Community Round-Up: ARM DynamIQ, GAP8, RISC-V Survey, BeagleBone Blue, Intel tinyTILE, Flow Batteries, Vint Cerf on Security, Employee IP Agreements, and an IoTUK Boost Extension

ARM, now under the ownership of Japanese technology giant Softbank, has announced a new microarchitecture for its next-generation processors, built with many-core and deep-learning projects firmly in mind: DynamIQ. “DynamIQ technology is a monumental shift in multicore microarchitecture for the industry and the foundation for future ARM Cortex-A processors. The flexibility and versatility of DynamIQ…

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