Developer Palmer Dabbelt has submitted a RISC-V port of glibc, the GNU C Library, for upstream inclusion and is actively working with others on a patch set for the Linux kernel with a view to mainline acceptance by Linux 4.14.
While the open RISC-V instruction set architecture (ISA) has been seeing increasing adoption of late, all the hardware in the world is useless without the software to drive it. A major milestone was reached earlier this year when the GCC Steering Committee accepted a RISC-V port of the GNU Compiler Collection, and now a patch set for the GNU C Library has been submitted.
Although some work needs to be done before the patches will be accepted for inclusion in the GNU C Library, the bulk of the hard work is completed – and similarly the same team is hopeful that a patch set for the Linux kernel can be completed and submitted for upstream inclusion in the coming weeks.
For those developing for RISC-V within the Windows environment, Microsemi has announced the release of a free integrated development environment (IDE) supporting RISC-V: SoftConsole 5.1
“With the majority of Microsemi FPGA designers utilising a Windows platform for their development efforts, SoftConsole v5.1 not only supports our RISC-V soft CPU cores to enable designs with our highly secure and reliable FPGAs but it can also be used for any RV32I standard ISA extensions,” claimed Microsemi’s Tim Morin at the launch. “This product release broadens the RISC-V ecosystem for those developing on Windows machines, and leverages our leadership position as we continue investing in this architecture to provide customers dependable, long-term roadmap support.”
SoftConsole itself is built around a collection of open-source components: the Eclipse IDE, Roa Logic RISC-V plugins, GNU ARM plug-ins, the GCC compilers for both RISC-V and ARM, and OpenOCD. Full details, as well as a link to download the software for both Windows and Linux, are available from the official website.
The lowRISC project, which aims to produce a fully open Linux-capable RISC-V system-on-chip, has announced its 0.4 milestone release this month.
Building on the project’s previous releases, the lowRISC 0.4 release includes a new tag cache with lowered overhead for a reduction in cache misses, support for specifying and configuring tag propogation and exception behaviour, and the integration of a “minion core” based on the PULPino RISC-V processor design. This “minion core”, the project’s maintainers have explained, will be responsible for handling peripherals including the SD card interface, keyboard, and display.
The lowRISC 0.4 release comes with images designed for the NExys 4 DDR Artix-7 FPGA development board, with more details available on the official website.
Finnish microprocessing company Minima Processor has announced the closure of €5.5 million (around £4.81 million) in seed funding which it will use to continue development of its low-power RISC-V-based chips.
Minima’s processor designs are centred around ultra-low-power microwatt-range usages, in particular where Long-range Radio (LoRa) Internet of Things (IoT) sensor platforms might need to run from battery or harvested power for long periods. Lifeline Venture’s Juha Lindfors had the following to say of his company’s investment in Minima: “We consider Minima’s technology as a very promising breakthrough that allows radically improved – as much as 20 times higher – processor energy efficiency. Minimising the energy consumption is the key factor In the vastly growing IoT markets and Minima’s expertise on that field is first‐class.”
Minima had previously announced a contract with an international semiconductor company to bring its designs into mass production, but has thus far not named the company involved.
If you’ve ever wondered about getting started with your own RISC-V design, AB Open’s Andrew Back has published a guide to building a RISC-V Arduino-compatible microcontroller using the Digilent Arty FPGA development board.
Available on RS Components’ DesignSpark site, Andrew’s guide is suitable for anyone with a basic knowledge of Linux and makefile-based software compilation, and walks through the installation and configuration of SiFive’s Freedom E300 RISC-V implementation – as found on the HiFive1 board reviewed earlier this year – onto the FPGA board to configure it as a RISC-V microcontroller.
“For a modest outlay and in no time at all you can be up and running with a customisable microcontroller platform, where you are free to hack away at the SoC design,” Andrew explains in conclusion. “Or if that is a little beyond your comfort zone, you can have what is likely the coolest Arduino-compatible right now.
For those more comfortable in the Go language, Reconfigure.io has launched a platform for creating FPGA gatewares and optionally deploying them to remotely-hosted FPGA hardware.
Launched as a small-scale alpha in 2016 and now available in beta status, Reconfigure.io aims to bring the advantages of customised hardware via FPGA platforms to programmers who have not previously experimented with the technology. “The rise of GitHub and Heroku have shown programmers and system administrators that distributing and deploying software can be as easy as a few clicks,” explained chief executive Rob Taylor of his company’s vision last year. “Reconfigure.io brings that simplicity to the world of FGPAs and thus enables staggering performance improvements.”
Reconfigure.io is accepting applications for beta programme membership now, but has not yet announced when it plans to offer an open beta or full platform launch.
The preparations for the Wuthering Bytes 2017 technology festival have officially begun to bear fruit with the latest update showcasing two new events of particular interest to CRU readers: Things Happening and IoT Build and Deploy.
The newly-announced IoT Build and Deploy workshop on Sunday the 3rd of September, hosted by Hebden Bridge-based hackerspace Bridge Rectifier, does what it says on the tin: offers a chance to get hands-on with the development and deployment of IoT devices and platforms. The next day, Monday the 4th of September, Things Happening at Hebden Bridge Town Hall offers an opportunity to get to grips with LoRaWAN wireless technology and The Things Network – or, if you’ve already been working with LoRaWAN, to network with other developers and show off what you’ve built.
For more information on these and other events making up Wuthering Bytes 2017, head to the official website for a full festival schedule.
If you like to do your tinkering in the privacy of your own workshop, there’s a new hobbyist-targeted LoRa development board available: LoraLand.
Based on the Atmel ATmega328P and a LoRa wireless module operating in the licence-free 433MHz spectrum, LoraLand is designed for use with the Arduino integrated development environment. 14 input-output pins are included as standard, of which three act as 10-bit analogue to digital converter (ADC) pins and two of which support pulse-width modulation (PWM).
The boards are priced at £23.42 via Tindie, with the promise of 868MHz and 915MHz variants to follow.
Web and retail giant Amazon has announced that it is looking to extend its Amazon Web Services (AWS) platform deep into the Internet of Things with Greengrass, a Linux runtime targeting IoT.
“AWS Greengrass is software that lets you run local compute, messaging, data caching, and sync capabilities for connected devices in a secure way,” Amazon claims of its new platform. “With AWS Greengrass, connected devices can run AWS Lambda functions, keep device data in sync, and communicate with other devices securely – even when not connected to the Internet. Using AWS Lambda, Greengrass ensures your IoT devices can respond quickly to local events, operate with intermittent connections, and minimise the cost of transmitting IoT data to the cloud.”
Full details of Greengrass, which is available now on all AWS accounts, can be found on the official website.
Screaming Circuits has published hard-won advice on component pin numbering that promises to save you time, effort, and cash when you’re taking devices from prototype through to production.
“Our all-things-about-electronics manufacturing standards body, the IPC, specifies the proper numbering order for most components. That’s a pretty nice thing that they do there, but it’s not always enough to prevent layout mishaps,” explains Screaming Circuits’ Duane Benson in a brief blog post. “It would be logical to assume that all dual inline components follow the same pattern. Logical, yes. Accurate, no.”
Duane points to the pin-outs for a small PC board mount switch, which comes in two flavours: one mounting flat and the other on its side. Despite being effectively the same switch, the pin-outs are completely different – something all-too-easy to overlook when you swap one component out for another.
Finally, Stack Overflow has poured oil on the troubled water of the tabs-versus-spaces style debate with the claim that developers who use spaces earn more than those who use tabs.
Based on a survey of 28,657 site members, Stack Overflow’s David Robinson reached an interesting conclusion: “Coders who use spaces for indentation make more money than ones who use tabs, even if they have the same amount of experience. Indeed, the median developer who uses spaces had a salary of $59,140, while the median tabs developer had a salary of $43,750.”
While David goes into details of correcting for different programming languages, national average incomes, and even years of experience, the conclusion remained: “Spaces beat tabs within every group,” showing an 8.6 percent higher salary – equivalent to an extra 2.4 years of programming experience.
Sadly, earning that extra 8.6 percent is hardly as simple as switching your habit from tabs to spaces!