The RISC-V Foundation has publicly published the proceedings of the 6th RISC-V Workshop, held early last month in Shanghai, China.
Video and, where appropriate, slide decks have been made available from the three public days of the four-day event. Highlights include updates from Rick O’Connor and Yunsup Lee on the RISC-V Foundation and RISC-V Technical Committee respectively, SiFive’s Andrew Waterman discussing the RISC-V privileged architecture, Syntacore’s Ekaterina Berezina on the SCR-1 RISC-V microcontroller core, Wei Song on the fourth lowRISC release, and Simon Rokicki’s presentation on RISC-V hardware-accelerated dynamic binary translation.
Another video likely to be of interest to those evaluating for or currently using RISC-V in their projects is the ‘ask me anything’ panel discussion, which took place on the second full day of the workshop following Andrew ‘Bunnie’ Huang’s keynote on impedance matching expectations between RISC-V and the open hardware community.
Imperas Software has announced the release of new Open Virtual Platform models, including 32-bit and 64-bit RISC-V implementations, allowing for instruction-accurate simulations for development and continuous integration.
“Imperas, a member of the RISC-V Foundation, has developed and released open source models of the RISC-V RV32I [32-bit] and RV64I [64-bit] cores through the Open Virtual Platforms (OVP) website,” explained RISC-V Foundation executive director Rick O’Conner at the launch. “These virtual platforms and models enable early software development, long before hardware is available, help lower software development costs, increase quality, improve time to market, and reduce software development risks.”
As well as the RISC-V cores, Imperas’ latest OVP releases include models for the ARMv8.1 Cortex-A family, Imagination MIPS I6400, and the Renesas RH850 microcontroller commonly found in automotive applications. Each processor model is open source and available for free download from the Open Virtual Platforms website now.
The RISC-V world grew larger late last month when French intellectual property (IP) licencor Cortus announced its own RISC-V implementation, APS3V, with its eye on the embedded markets.
“The APS3V is our first RISC-V processor core. It offers the RV32IMC ISA [Instruction Set Architecture] with a Harvard architecture and AXI4 lite bus interfaces,” the company announced of its design, while revealing also that additional RISC-V cores are under active development. “It has a four stage pipeline and requires about 17000 gates. It supports both Machine and User modes.”
A preliminary datasheet for the APS3V is available upon application to Cortus using the following request form.
For those closer to the prototyping stage of product development, a new RISC-V microcontroller is likely to generate considerable interest: the Arduino Cinque.
Designed in partnership with SiFive and based on the same FE310 system-on-chip as the HiFive1 board we tested earlier this year, the Arduino Cinque includes the familiar Arduino board layout coupled with the RISC-V core running at 320MHz and an Espressif ESP32 offering Bluetooth and Wi-Fi connectivity.
“By partnering with a pioneer in open-source hardware, SiFive can further advance the progress of open custom silicon among makers, system designers and everyone else in between,” claimed SiFive’s Jack Kang at the unveiling. “We continue to be blown away by the support and attention the open-source silicon movement has gained in the past year alone. We look forward to seeing the community’s reaction to the Arduino Cinque board, and believe that the Arduino concepts of openness and distribution mean that more people than ever will be exposed to RISC-V.”
Details of the Arduino Cinque board have not yet been made publicly available, though final board revisions were demonstrated during the Maker Faire Bay Area event late last month.
For those working with the x86 architecture, the MinnowBoard.org Foundation has announced a new open hardware development board with a quad-core Intel processor: the MinnowBoard Turbot.
The compact MinnowBoard Turbot features a quad-core 64-bit Intel Atom E3845 processor running at 1.91GHz – or, optionally, a passively-cooled dual-core Atom E3826 running at 1.46GHz – alongside 2GB of DDR3L memory. A micro-SD slot is joined by a SATA 2.0 port for mass storage, while the board includes USB 2.0 and USB 3.0 host ports, eight buffered general-purpose input output (GPIO) pins, I²C, SPI, and gigabit Ethernet as standard.
“The MinnowBoard programme is committed to helping the IoT [Internet of Things] community get products out the door quickly and cost effectively,” claimed Kathleen Kovatch, president of the MinnowBoard.org Foundation, at the board’s launch. “The Turbot quad-core is perfect for professional engineers pursuing embedded projects in industries such as consumer electronics, smart home devices, and industrial or factory automation.”
Microchip has announced a new entry in its PIC32 family, its first to include an integrated hardware-accelerated graphics processing unit (GPU) for two-dimensional imagery and embedded DDR2 dynamic memory.
The PIC32MZ DA microcontrollers are, Microchip has announced, available with up to 32MB of DDR2 memory on-board or 128MB externally and all include a graphics processor designed to simplify integration with displays up to an SXGA (Super Extended Graphics Array) resolution of 1,280×1,024 in full colour. The company is positioning the parts as an alternative to microprocessor units (MPUs) for developers already well invested in the PIC32 ecosystem.
“This new family of devices breaks through perceived MCU graphics barriers,” claimed Rod Drake, vice president of Microchip’s MCU32 business unit, at the announcement. “Customers are demanding greater HMI [Human-Machine Interface] capability in their designs. Now they can upgrade their applications with the ease of an MCU without increasing board complexity or adding new programming resources.”
More information on the PIC32MZ DA family is available from the official website.
Cambridge-based ARM has announced the latest commercial chip designs to feature its new DynamIQ technology: the high-performance Cortex-A75 and high-efficiency mid-range Cortex-A55.
According to ARM, the Cortex-A75 represents a 20 percent integer and up to near-50 percent floating-point performance boost over the Cortex-A73 it replaces for the same power draw with a broad range of applications. “It is targeted across a broad selection of markets, from edge to the cloud,” claimed ARM’s Stefan Rosinger. “It goes beyond mobile phones and laptop/clamshell devices, enabling new performance in network infrastructure, automotive designs, and potentially even servers.”
The Cortex-A55, meanwhile, replaces the Cortex-A53 and is designed for power efficiency. Rather than simply being used on its own, however, the company is positioning the cores to be used in system-on-chip (SoC) designs alongside the Cortex-A75 with the latter providing on-demand performance and the former battery-friendly background task operation.
ARM has confirmed ten licensees for the new parts, with the first consumer products featuring the cores expected to land on shelves in early 2018.
Intel, meanwhile, is continuing with its efforts to win embedded market share from ARM, announcing partnerships with Dell, Lenovo, and others for its Compute Card embedded platform.
Formally unveiled in its finished form at the Computex 2017 trade show late last month, the Compute Card family will come in four tiers: an entry-level Celeron N3450 version with 64GB of eMMC storage; a Pentium N4200 version with the same storage; a Core m3 version with 128GB of SSD storage; and a top-end Core i5 vPro model with the same storage. Each is slightly longer than a standard credit card at 95mm by 55mm and is 5mm thick, with a docking connector at one end.
The Compute Cards, Intel promises, will begin appearing in designs including laptops, tablets, digital signage systems, point-of-sale (POS) systems, all-in-one (AIO) PCs, and intelligent whiteboards from a range of partner companies. When systems require upgrading, the company’s plan goes, the compact Compute Card can be quickly ejected and replaced with a more powerful future model.
The first Intel Compute Cards are expected to hit the market in August, with more information available from the official website.
Those working with pulse-width modulation (PWM) in their projects may find Alperen Akküncü’s article on doubling frequency and resolution on the EDN Network a helpful resource.
Briefly discussing and dismissing traditional techniques for reducing ripple in a PWM digital-to-analogue converter (DAC), Alperen demonstrates how to use two PWM signals at a 180° phase difference to cancel out the harmonics and increase either the frequency or the resolution. Although built on a Texas Instruments MSP430 Launchpad development board, Alperen’s technique is applicable to a range of microcontrollers including many of the ATmega and STM32 families.
Finally, Gordon Williams has published a fascinating article on the success of his Espruino microcontroller platform and the challenges he encountered starting and running an open-source hardware and software concern.
“Open source software usually relies on offering a consulting business around an open source product — where you can work with your software more efficiently than others can,” Gordon advises. “However, things get a lot murkier when open source hardware and software collide — which will be happening more and more in the future.”
The full article is available on the Make Magazine website, or in the publication’s latest paper issue.