RDM Makerspace's Marvin LoRa Development Board

Community Round-Up: LoRa and FPGA Boards, RISC-V Progress, and ePython 1.0

Technology journalist Gareth Halfacree has launched the AB Open Community Round-Up series, offering a fortnightly glimpse at what’s happening in and around open source hardware and software, wireless and related topics.

For those looking to experiment with long-range radio-based wide-area networking, Niels Stamhuis’ Marvin development board aims to simplify prototyping of LoRaWAN and other LoRa projects.

Designed with colleagues at the RDM Makerspace, the Marvin board takes the form of a compact USB stick which can be programmed as an Arduino board but includes a Microchip RN2483 module for connectivity to LoRaWAN or other LoRa-standard networks.

The design, including documentation, is available under permissive licences, while the Marvin project’s Kickstarter campaign has beaten its modest €10,000 funding goal with two weeks left on the clock. Boards start at €70 (£60), with a starter kit including board, USB battery pack, and a temperature sensor priced at €80 (£69).

Those more interested in development on field-programmable gate array (FPGA) platforms will be pleased to hear that a fresh batch of low-cost open-source MyStorm boards is due to hit the UK today.

MyStorm boards are based around the Lattice ICE40HX4K FPGA and aim to offer a low-cost, open platform complete with open-source toolchain – a rarity in the FPGA realm, where development is typically restricted to proprietary closed-source tools.

The trials and tribulations in getting the boards produced in China have been detailed by co-creator Ken Boak in the blog post A Storm in the Making, and he has confirmed that boards from the latest production batch are scheduled for delivery later today.

If you’re around London in early December, meanwhile, Ken is due to run a free FPGA programming workshop through the Open Source Hardware User Group (OSHUG) on December 1st.

French startup GreenWaves Technologies has claimed that its upcoming GAP8 processor, based on the open RISC-V design created at the University of California, Berkeley, will beat out the ARM Cortex-M0 through Cortex-M7 for efficiency.

In a presentation at the Semicon Europa event, company co-founder Joel Cambonie claimed that the use of the RISC-V PULP core design from the Universities of Bologna and ETF Zurich means a two-fold improvement in energy efficiency over ARM-based cores.

According to a write-up of the event at EE Times, GreenWaves plans to tape out the GAP8 in December with a view to commercial availability in February 2017. The GAP8 will go up against SiFive’s Freedom family of RISC-V parts, launched back in July.

Finally, anyone working with the Adapteva Epiphany many-core architecture, in particular on the Parallella family of development boards, will be pleased to read the announcement that ePython has reached the milestone of a version 1.0 release.

Developed by Nick Brown for the Epiphany and similar low-memory many-core chip architectures, ePython is a Python interpreter with a focus on heavy parallelism. Code executed under ePython runs on all cores, while communication to a mainstream Python interpreter running on the central processor is possible for command and control purposes.

Changes for ePython’s 1.0 release include improved syntax, tidied tutorials, garbage collection, full-scale memory management, and non-blocking P2P communications, among other enhancements. The software remains licensed under the BSD 2.0 licence and is available on Nick’s GitHub.




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